asahi kasei [akd4562] 00/06 - 1 - general description akd4562 is an evaluation board for the portable digital audio 20bit a/d and d/a converter, AK4562. the akd4562 can evaluate a/d converter d/a converter separately in addition to loopback mode (a/d ? d/a). the a/d section can be evaluated by interfacing with akms dac evaluation boards directly. the akd4562 has the interface with akms wave generator using rom data and akms adc evaluation boards. therefore, its easy to evaluate the d/a section. the akd4562 also has the digital audio interface and can achieve the interface with digital audio systems via opt-connector. n ordering guide akd4562 --- evaluation board for AK4562 (cable for connecting with printer port of ibm-at, compatible pc and control software are packed with this.) function compatible with 2 types of interface - direct interface with akms a/d & d/a converter evaluation boards - dit/dir with optical input/output bnc connector for an external clock input 10pin header for serial control mode lin1/2 cs8412 (dir) ak4353 clock generator vt va gnd rin1/2 lout1/2 rout1/2 AK4562 (dit) opt out opt in 10pin header a/d, d/a data rom data control data 10pin header figure 1. akd4562 block diagram * circuit diagram and pcb layout are attached at the end of this manual. evaluation board rev.a for AK4562 akd4562
asahi kasei [akd4562] 00/06 - 2 - 1. evaluation board manual n input / output circuits & set-up jumper pin for input / output circuits (1) line block (a) lin1,2/rin1,2 input circuits rin1 rin2 lin2 lin1 j2 lin r36 560 + c38 10u j4 rin r38 560 + c41 10u jp15 lin jp18 rin lin1 lin2 rin1 rin2 figure 2. lin1,2/rin1,2 input circuits 1. analog signal is input to lin1 and rin1 pins via j2 and j4 connectors. jp15 lin lin2 lin1 jp18 rin rin2 rin1 2. analog signal is input to lin2 and rin2 pins via j2 and j4 connectors. jp15 lin lin2 lin1 jp18 rin rin2 rin1
asahi kasei [akd4562] 00/06 - 3 - (b) lout1/rout1 and opgal/opgar selection circuits rout1 opgal lout1 opgar + c39 1u + c37 22u jp17 opgl r39 220 r34 220 + c43 1u j5 rout1 + c40 1u r35 10k j3 lout1 r37 560 jp16 lio jp20 opgr jp19 rio + c44 1u r40 10k + c42 22u r41 560 lout1 rout1 opgl opgl lout1 opgr opgr rout1 figure 3. lout1/rout1 and opgal/opgar selection circuits 1. analog signal is input to opgal and opgar pins via j3 and j5 connectors. jp19 rio jp17 opgl opgr rout1 opgl lout1 jp16 lio opgl lout1 jp20 opgr opgr rout1 2. analog signal is output to lout1 and rout1 pins via j3 and j5 connectors. jp19 rio jp17 opgl opgr rout1 opgl lout1 jp16 lio opgl lout1 jp20 opgr opgr rout1 3. analog signal is input to opgal and opgar pins via lout1 and rout1 pins. jp19 rio jp17 opgl opgr rout1 opgl lout1 jp16 lio opgl lout1 jp20 opgr opgr rout1
asahi kasei [akd4562] 00/06 - 4 - (2) other jumper pins 1. jp1 (csn) : selection of csn pin ssb : ssb mode. akm : akm mode. 2. jp2 (ssb) : selection of ssb mode or akm mode open : akm mode. short : ssb mode. 3. jp3 (tst) : selection of test pin open : normal mode. short : test mode. * always open. 4. jp4 (gnd) : analog ground and digital ground open : separated. short : common. (the connector dgnd can be open.) 5. jp5 (vt) : d2v and vt open : separated. short : common. (the connector vt can be open.) 6. jp9 (sdto) : sdto of AK4562 always open. it can be short for only evaluation mode 7). 7. jp10 (mode) : setting mode of cs8412 open : i 2 s compatible mode. short : 16 bit lsb justified. * akm assumes no responsibility for the trouble when using the above circuit examples. n operation sequence 1) set up the power supply lines. [va] (orange) = 2.2 ~ 3.0v : for va of AK4562 (typ. 2.5v) [vt] (orange) = 1.8 ~ 3.0v : for vt of AK4562 (typ. 2.5v) [d2v] (orange) = 1.8 ~ 3.0v : for 74lvc541 (typ. 2.5v) [d5v] (red) = 3.6 ~ 5.0v : for logic (typ. 5.0v) [agnd] (black) = 0v : for analog ground [dgnd] (black) = 0v : for logic ground each supply line should be distributed from the power supply unit. vt and d2v must be same voltage level. 2) set up the evaluation mode, jumper pins and dip switches. (see the followings.) note : this evaluation board corresponds to i 2 s compatible mode for evaluation of a/d. 3) power on. the AK4562 and ak4353 should be reset once bringing sw1, 2 l upon power-up.
asahi kasei [akd4562] 00/06 - 5 - n evaluation mode applicable evaluation mode 1) evaluation of loopback mode (default) 2) evaluation of d/a using ideal sine wave generated by rom data 3) evaluation of d/a using a/d converted data 4) evaluation of d/a using dir (optical link) 5) evaluation of a/d using d/a converted data 6) evaluation of a/d using dit (optical link) 7) all interface signals including master clock are fed externally. dit port1 port3 dir akd53xx a/d board rom board akd43xx d/a board port4 akd4562 1) 2) 3) 4) 5) 6) cd player 10pin-header 10pin-header port2 1) evaluation of loopback mode. nothing should be connected to port3 and port4. in case of using external clock through a bnc connector (j1), select ext on jp13 (clk) and short jp14 (xte). this mode corresponds to only i 2 s compatible mode. jp13 clk jp12 dir jp6 x_bclk 64fs 32fs jp8 bclk jp14 xte jp7 lrck dir adc dir ext xtl gnd vd jp11 sdti di r adc di r adc
asahi kasei [akd4562] 00/06 - 6 - 2) evaluation of d/a using a/d converted data from ideal sine wave generated by rom data. digital signals generated by akd43xx are used. port3 is used for the interface with akd43xx. master clock is sent from akd4562 to akd43xx and bclk, lrck, sdti are sent from akd43xx to akd4562. nothing should be connected to port4. in case of using external clock through a bnc connector (j1), select ext on jp13 (clk) and short jp14 (xte). jp13 clk jp12 dir jp6 x_bclk 64fs 32fs jp8 bclk jp14 xte jp7 lrck dir adc dir ext xtl gnd vd jp11 sdti di r adc di r adc 3) evaluation of d/a using a/d converted data. it is possible to make evaluation in the form of analog inputs and analog outputs by interfacing with various akms a/d evaluation boards with port3. nothing should be connected to port4. in case of using external clock through a bnc connector (j1), select ext on jp13 (clk) and short jp14 (xte). jp13 clk jp12 dir jp6 x_bclk 64fs 32fs jp8 bclk jp14 xte jp7 lrck dir adc dir ext xtl gnd vd jp11 sdti di r adc di r adc 4) evaluation of d/a using dir. (optical link) port4 (dir) is used. dir generates mclk, bclk, lrck and sdata from the received data through optical connector (torx176). used for the evaluation using cd test disk. nothing should be connected to port3. dir (cs8412) corresponds to only i 2 s compatible mode or 16 bit lsb justified. jp13 clk jp12 dir jp6 x_bclk 64fs 32fs jp8 bclk jp14 xte jp7 lrck dir adc dir ext xtl gnd vd jp11 sdti di r adc di r adc
asahi kasei [akd4562] 00/06 - 7 - 5) evaluation of a/d using d/a converted data. it is possible to make evaluation in the form of analog inputs and analog outputs by interfacing with various akms d/a evaluation boards with port3. nothing should be connected to port4. jp13 clk jp12 dir jp6 x_bclk 64fs 32fs jp8 bclk jp14 xte jp7 lrck dir adc dir ext xtl gnd vd jp11 sdti di r adc di r adc 6) evaluation of a/d using dit. (optical link) port1 (dit) is used. dit generates audio bi-phase signal from received data and which is output through optical connector (totx176). it is possible to connect akms d/a converter evaluation boards on the digital-amplifier which equips dir input. nothing should be connected port3 and port4. in case of using external clock through a bnc connector (j1), select ext on jp13 (clk) and short jp14 (xte). dit (ak4353) corresponds to only i 2 s compatible mode. jp13 clk jp12 dir jp6 x_bclk 64fs 32fs jp8 bclk jp14 xte jp7 lrck dir adc dir ext xtl gnd vd jp11 sdti di r adc di r adc 7) all interfacing signals (mclk, bclk, lrck) are fed from the external circuit through port3. port3 is used. jp7, 8, 11 and 13 should be open. jp13 clk jp12 dir jp6 x_bclk 64fs 32fs jp8 bclk jp14 xte jp7 lrck dir adc dir ext xtl gnd vd jp11 sdti di r adc di r adc n the function of the toggle sw upper-side is h and lower-side is l. [sw1] (pdn): power down of AK4562. keep h during normal operation. [sw2] (dit): power down of ak4353. keep h during normal operation. n indication for led [led1] (verf): monitor verf pin of the cs8412. led turns on when some error has occurred to cs8412. [led2] (prem): indicate whether the input data of cs8412 is pre-emphasized or not.
asahi kasei [akd4562] 00/06 - 8 - n serial control the AK4562 can be controlled via the printer port (parallel port) of ibm-at compatible pc. connect port2 (ctrl) with pc by 10 wire flat cable packed with the akd4562. connect csn cclk cdti 10pin header 10pin connector 10 wire flat cable pc akd4562 figure 4. connect of 10 wire flat cable
asahi kasei [akd4562] 00/06 - 9 - 2. control software manual n set-up of evaluation board and control software 1. set up the akd4562 according to previous term. 2. connect ibm-at compatible pc with akd4562 by 10-line type flat cable (packed with akd4562). take care of the direction of 10pin header. (this control software does not operate on windows nt, therefore please operate it on windows95/98.) 3. insert the floppy-disk labeled akd4562 control program ver 1.0 into the floppy-disk drive. 4. access the floppy-disk drive and double-click the icon of akd4562.exe to set up the control program. this software corresponds to only akm mode. 5. then please evaluate according to the follows. n explanation of each buttons 1. [port setup] : set up the printer port. 2. [reset] : initialize the register of AK4562. 3. [function1] : dialog to write data by keyboard operation. 4. [function2] : dialog to evaluate ipga and opga. 5. [write] : dialog to write data by mouse operation. note : ak4353(dit) is fixed to mclk=256fs and i 2 s compatible mode. therefore, in the case of evaluation for AK4562s adc, it is necessary for AK4562 to set up mclk=256fs and i 2 s compatible mode. n explanation of each dialog 1. [function1 dialog] : dialog to write data by keyboard operation address box: input register address in 2 figures of hexadecimal. data box: input register data in 2 figures of hexadecimal. if you want to write the input data to AK4562, click ok button. if not, click cancel button.
asahi kasei [akd4562] 00/06 - 10 - 2. [function2 dialog] : dialog to evaluate ipga and opga this dialog corresponds to only addr=03h and 04h. address box: input register address in 2 figures of hexadecimal. start data box: input start data in 2 figures of hexadecimal. end data box: input end data in 2 figures of hexadecimal. interval box: data is written to AK4562 by this interval. step box: data changes by this step. mode select box: if you check this check box, data reaches end data, and returns to start data. [example] start data = 00, end data = 09 data flow: 00 01 02 03 04 05 06 07 08 09 09 08 07 06 05 04 03 02 01 00 if you do not check this check box, data reaches end data, but does not return to start data. [example] start data = 00, end data = 09 data flow: 00 01 02 03 04 05 06 07 08 09 if you want to write the input data to AK4562, click ok button. if not, click cancel button. 3. [write dialog] : dialog to write data by mouse operation there are dialogs corresponding to each register. click the write button corresponding to each register to set up the dialog. if you check the check box, data becomes h or 1. if not, l or 0. if you want to write the input data to AK4562, click ok button. if not, click cancel button. n operation flow keep the following flow surely . 1. set up the control program according to explanation above. 2. click port setup button. 3. click write default button. 4. then set up the dialog and input data. n indication of data input data is indicated on the register map. red letter indicates h or 1 and blue one indicates l or 0. blank is the part that is not defined in the datasheet. n attention on the operation if you set up function1 or function2 dialog, input data to all boxes. attention dialog is indicated if you input data or address that is not specified in the datasheet or you click ok button before you input data. in that case set up the dialog and input data once more again. these operations does not need if you click cancel button or check the check box.
asahi kasei [akd4562] 00/06 - 11 - measurement results [measurement condition] measurement unit : audio precision, system two mclk : 256fs bclk : 64fs fs : 44.1khz bit : 20bit power supply : va=vd=vt=2.5v interface : dir/dit temperature : room [measurement results] parameter input pin results (lch / rch) unit adc analog input characteristics s/(n+d) (-0.5db input) lin1 / rin1 lin2 / rin2 85.3 / 84.8 85.4 / 84.7 db db d-range (a-weighted) lin1 / rin1 lin2 / rin2 88.6 / 88.6 88.6 / 88.6 db db s/n (a-weighted) lin1 / rin1 lin2 / rin2 88.6 / 88.6 88.6 / 88.6 db db interchannel isolation lin1 / rin1 lin2 / rin2 109.6 / 108.7 109.7 / 109.8 db db dac analog output characteristics s/(n+d) - 89.5 / 89.5 db d-range (a-weighted) - 93.0 / 93.0 db s/n (a-weighted) - 93.2 / 93.2 db interchannel isolation - 109.5 / 108.7 db output pga characteristics (opga) s/(n+d) opgal / opgar 91.7 / 91.7 db s/n (a-weighted) opgal / opgar 94.2 / 94.2 db noise level at mute (a-weighted) opgal / opgar 108.5 / 108.6 db
asahi kasei [akd4562] 00/06 - 12 - [adc plot] akm AK4562 t hd+n vs. input level va=vd=vt=2 .5v, fs=44.1khz, fin=1khz -120 -10 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 dbr -100 -70 -97 -94 -91 -88 -85 -82 -79 -76 -73 d b f s figure 1. thd+n vs. input level akm AK4562 t hd+n vs. input frequency va=vd=vt=2 .5v, fs=44.1khz, input=-0.5dbr 20 20k 50 100 200 500 1k 2k 5k 10k hz -100 -70 -97 -94 -91 -88 -85 -82 -79 -76 -73 d b f s figure 2. thd+n vs. input frequency
asahi kasei [akd4562] 00/06 - 13 - akm AK4562 lin earity va=vd=vt=2 .5v, fs=44.1khz, fin=1khz -120 +0 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 dbr -120 +0 -100 -80 -60 -40 -20 d b f s figure 3. linearity akm AK4562 f requency response va=vd=vt=2 .5v, fs=44.1khz, input=-0.5dbr 20 20k 50 100 200 500 1k 2k 5k 10k hz -2 +0 -1.8 -1.6 -1.4 -1.2 -1 -0.8 -0.6 -0.4 -0.2 d b f s figure 4. frequency response
asahi kasei [akd4562] 00/06 - 14 - akm AK4562 c rosstalk va=vd=vt=2 .5v, fs=44.1khz, input=-0.5dbr 20 20k 50 100 200 500 1k 2k 5k 10k hz -130 -90 -125 -120 -115 -110 -105 -100 -95 d b figure 5. crosstalk akm AK4562 fft plot va=vd=vt=2 .5v, fs=44.1khz, input=-0.5dbr, fin=1khz 20 20k 50 100 200 500 1k 2k 5k 10k hz -160 +0 -140 -120 -100 -80 -60 -40 -20 d b f s figure 6. fft plot
asahi kasei [akd4562] 00/06 - 15 - akm AK4562 fft plot va=vd=vt=2 .5v, fs=44.1khz, input=-60dbr, fin=1khz 20 20k 50 100 200 500 1k 2k 5k 10k hz -160 +0 -140 -120 -100 -80 -60 -40 -20 d b f s figure 7. fft plot akm AK4562 fft plot va=vd=vt=2 .5v, fs=44.1khz, fin=none 20 20k 50 100 200 500 1k 2k 5k 10k hz -160 +0 -140 -120 -100 -80 -60 -40 -20 d b f s figure 8. fft plot
asahi kasei [akd4562] 00/06 - 16 - [dac plot] akm AK4562 t hd+n vs. input level va=vd=vt=2 .5v, fs=44.1khz, fin=1khz -120 +0 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 dbfs -100 -70 -97 -94 -91 -88 -85 -82 -79 -76 -73 d b r a figure 1. thd+n vs. input level akm AK4562 t hd+n vs. input frequency va=vd=vt=2 .5v, fs=44.1khz, input=0dbfs 20 20k 50 100 200 500 1k 2k 5k 10k hz -100 -80 -98 -96 -94 -92 -90 -88 -86 -84 -82 d b r a figure 2. thd+n vs. input frequency
asahi kasei [akd4562] 00/06 - 17 - akm AK4562 lin earity va=vd=vt=2 .5v, fs=44.1khz, fin=1khz -120 +0 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 dbfs -120 +0 -100 -80 -60 -40 -20 d b r a figure 3. linearity akm AK4562 f requency response va=vd=vt=2 .5v, fs=44.1khz, input=0dbfs 2k 20k 4k 6k 8k 10k 12k 14k 16k 18k hz -0.5 +0.5 -0.4 -0.3 -0.2 -0.1 +0 +0.1 +0.2 +0.3 +0.4 d b r a figure 4. frequency response
asahi kasei [akd4562] 00/06 - 18 - akm AK4562 c rosstalk va=vd=vt=2 .5v, fs=44.1khz, input=0dbfs 20 20k 50 100 200 500 1k 2k 5k 10k hz -130 -80 -125 -120 -115 -110 -105 -100 -95 -90 -85 d b figure 5. crosstalk akm AK4562 fft plot va=vd=vt=2 .5v, fs=44.1khz, input=0dbfs, fin=1khz 20 20k 50 100 200 500 1k 2k 5k 10k hz -160 +0 -140 -120 -100 -80 -60 -40 -20 d b r a figure 6. fft plot
asahi kasei [akd4562] 00/06 - 19 - akm AK4562 fft plot va=vd=vt=2 .5v, fs=44.1khz, input=-60dbfs, fin=1khz 20 20k 50 100 200 500 1k 2k 5k 10k hz -160 +0 -140 -120 -100 -80 -60 -40 -20 d b r a figure 7. fft plot akm AK4562 fft plot va=vd=vt=2 .5v, fs=44.1khz, fin=none 20 20k 50 100 200 500 1k 2k 5k 10k hz -160 +0 -140 -120 -100 -80 -60 -40 -20 d b r a figure 8. fft plot
a a b b c c d d e e e e d d c c b b a a AK4562 sub a akd4562 a3 11 wednesday, february 02, 2000 title size document number rev date: sheet of cn2 1 2 3 4 5 6 7 8 9 10 11 12 13 cn4 14 15 16 17 18 19 20 21 22 23 24 25 26 c5 0.1u + c4 2.2u c1 0.1u + c6 10u c2 0.1u + c7 10u c3 0.1u + c8 10u cn3 27 28 29 30 31 32 33 34 35 36 37 38 39 cn1 40 41 42 43 44 45 46 47 48 49 50 51 52 r9 10 r1 51 r2 51 r3 51 r4 51 r5 51 r6 51 r7 51 r8 51 u1 AK4562 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 opgar lout2 rout2 lin1 rin1 lin2 rin2 vcom agnd va vref vd dgnd vt sdto sdti bclk tst mclk lrck cdti cclk csn pdn ssb lout1 opgal rout1
a a b b c c d d e e e e d d c c b b a a agnd dgnd ssb akm open = "l" short = "h" h l open = "l" short = "h" AK4562 a akd4562 a3 13 tuesday, june 13, 2000 title size document number rev date: sheet of lin2 rin2 lout2 rout2 ssb pdn csn cclk cdti sdto sdti bclk tst mclk lrck opgar opgal rout1 lout1 csn csn1 ssb pdn tst rin1 lin1 va vt d2v d5v d2v vt d2v c7 0.1u + c6 2.2u c3 0.1u + c8 10u c4 0.1u + c9 10u c5 0.1u + c10 10u r12 10 + c13 47u l3 (short) 1 2 l2 10u 1 2 + c11 47u jp4 gnd r10 51 r9 51 r8 51 r7 51 r6 51 r4 51 r5 51 r1 51 c2 0.1u + c1 47u l1 10u 1 2 jp1 csn jp2 ssb r2 47k sw1 pdn 2 1 3 d1 1s1588 2 1 r11 10k c12 0.1u jp3 tst r3 47k u2 74lv c541 2 3 4 5 6 7 8 9 1 19 18 17 16 15 14 13 12 11 20 10 a1 a2 a3 a4 a5 a6 a7 a8 g1 g2 y1 y2 y3 y4 y5 y6 y7 y8 vcc gnd u1 AK4562 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 nc nc lout2 rout2 nc nc lin1 rin1 nc lin2 rin2 nc nc nc nc vcom nc agnd va vref nc vd dgnd vt nc nc nc nc sdto sdti bclk tst mclk lrck nc cdti cclk nc nc nc nc csn pdn ssb nc lout1 opgal nc rout1 opgar nc nc jp5 vt u3a 74hc14 1 2 u3b 74hc14 3 4
a a b b c c d d e e e e d d c c b b a a 64fs fs 32fs adc dir mclk bclk lrck sdti rom xtl ext dir for 74hcu04, 74hc14, 74hc4040 lh adc adc dir dir vd gnd csn cclk / sck cdti / ssi sdto short = "h" open = "l" for sn74l vc07a interface a akd4562 a3 23 monday, january 24, 2000 title size document number rev date: sheet of x_bclk x_lrck mclk sdto sdti bclk dir_ bclk x_lrck dir_lrck x_bclk lrck csn1 cclk cdti csn1 cclk cdti sdto1 sdto1 dir_ bclk dir_lrck m0/2 m1 m1 m0/2 d5v d5v d5v d5v d5v d5v d5v d5v d5v d5v d2v r13 1k r17 10k c31 0.1u + c32 10u c33 0.01u c36 0.01u r31 1k led2 prem 2 1 l5 10u 1 2 led1 verf 2 1 r29 1k jp12 dir r33 51 j1 ext + c27 10u c28 0.1u jp14 xte r30 1m x1 11.2896mhz 1 2 c23 0.1u c24 0.1u c25 0.1u + c22 47u jp6 x_bclk jp9 sdto r26 10k jp8 bclk jp7 lrck c14 0.1u c17 0.1u d2 1s1588 2 1 sw2 dit 2 1 3 port1 dit 1 2 3 4 5 6 gnd if vcc in 5 6 l6 47u 1 2 r28 1k port4 dir 1 3 4 2 6 5 out vcc gnd gnd 6 5 u4 ak4353 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 mcko tx dvdd dvss mcki bick sdti lrck pdn csn scl/cclk sda/cdti tst ttl i2c cad1 cad0 aoutr aoutl vcom avss avdd nc dzf c18 0.1u c20 0.1u + c19 10u + c21 10u r19 5.1 c16 0.1u + c15 10u port3 rom 1 2 3 4 5 6 7 8 9 10 jp11 sdti port2 ctrl 1 2 3 4 5 6 7 8 9 10 r18 51 r20 51 r21 51 r14 10k r15 10k r16 10k jp13 clk l4 10u 1 2 u5 74hc4040 10 11 9 7 6 5 3 2 4 13 12 14 15 1 clk rst q1 q2 q3 q4 q5 q6 q7 q8 q9 q10 q11 q12 u8b 74hcu04 3 4 u8c 74hcu04 5 6 r25 1k r32 1k c34 47n c35 0.1u u7 cs8412 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 c cd/f1 cc/f0 cb/e2 ca/e1 c0/e0 vd+ dgnd rxp rxn fsync sck cs12/fck u cbl sel m3 m2 mck filt agnd va+ m0 m1 erf sdata ce/f2 verf jp10 mode r27 47k r22 51 r23 51 r24 51 u6a sn74lvc07a 1 2 c26 0.1u c30 (open) c29 (open) u8a 74hcu04 1 2 u3c 74hc14 5 6 u3d 74hc14 9 8 u3f 74hc14 13 12 u3e 74hc14 11 10
a a b b c c d d e e e e d d c c b b a a lin1 lin2 rout1 opgr lout1 opgl rin1 rin2 lout1 opgl rout1 opgr input/output a akd4562 a3 33 tuesday, december 21, 1999 title size document number rev date: sheet of lout2 rout2 rout1 opgar lout1 opgal rin1 rin2 lin2 lin1 j2 lin r36 560 + c38 10u j6 lout2 r42 220 r43 10k + c45 22u j7 rout2 r44 220 r45 10k + c46 22u + c42 22u r39 220 j5 rout1 r40 10k jp19 rio r41 560 + c44 1u + c43 1u + c37 22u r34 220 j3 lout1 r35 10k jp16 lio r37 560 + c40 1u + c39 1u j4 rin r38 560 + c41 10u jp17 opgl jp20 opgr jp15 lin jp18 rin u8d 74hcu04 9 8 u8e 74hcu04 11 10 u8f 74hcu04 13 12 u6b sn74lvc07a 3 4 u6d sn74lvc07a 9 8 u6f sn74lvc07a 13 12 u6c sn74lvc07a 5 6 u6e sn74lvc07a 11 10
important notice these products and their specifications are subject to change without notice. before considering any use or application, consult the asahi kasei microsystems co., ltd. (akm) sales office or authorized distributor concerning their current status. akm assumes no liability for infringement of any patent, intellectual property, or other right in the application or use of any information contained herein. any export of these products, or devices or systems containing them, may require an export license or other official approval under the law and regulations of the country of export pertaining to customs and tariffs, currency exchange, or strategic materials. akm products are neither intended nor authorized for use as critical components in any safety, life support, or other hazard related device or system, and akm assumes no responsibility relating to any such use, except with the express written consent of the representative director of akm. as used here: a. a hazard related device or system is one designed or intended for life support or maintenance of safety or for applications in medicine, aerospace, nuclear energy, or other fields, in which its failure to function or perform may reasonably be expected to result in loss of life or in significant injury or damage to person or property. b. a critical component is one whose failure to function or perform may reasonably be expected to result, whether directly or indirectly, in the loss of the safety or effectiveness of the device or system containing it, and which must therefore meet very high standards of performance and reliability. it is the responsibility of the buyer or distributor of an akm product who distributes, disposes of, or otherwise places the product with a third party to notify that party in advance of the above content and conditions, and the buyer or distributor agrees to assume any and all responsibility and liability for and hold akm harmless from any and all claims arising from the use of said product in the absence of such notification.
|
